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Whitepaper

Setting The Foundation for Next-Generation Communications Applications


    OSEck (OSE compact kernel) RTOS

    Compact, deterministic RTOS for DSPs

    • Full-featured, compact real-time kernel
    • Optimized for Digital Signal Processors (DSP)
    • High performance, small memory footprint
    • Deterministic hard real-time response, low interrupt latency, and high data throughput
    • Built-in error detection and handling
    • Powerful programming model enhances end-product quality and lowers development cost
    • Simple, but versatile API; Code most of your application with just eight system calls

    The Most Advanced Commercial RTOS for DSPs

    OSEck (OSE Compact Kernel) is a DSP-optimized version of Enea’s full-featured OSE RTOS. Occupying as little as 8 kbytes of memory, OSEck delivers fully-preemptive, event-driven real-time response and features built-in error detection and handling. This combination makes OSEck ideal for telecom, datacom, automotive, industrial control, medical and mil/aero applications with tight memory constraints that require reliable real-time control and signal processing.

    High-Level Message Passing Programming Model

    Like all members of the OSE family, OSEck employs a high-level message passing programming model that makes it easy to break complex applications into simpler concurrent processes, each communicating via high-speed direct messages. This high level of abstraction makes complex applications easier to conceptualize, model, partition, and debug. It also provides transparency that separates applications from the details of the underlying hardware and physical topology, thereby making the resulting code more scalable and easy to migrate.

    Simple, but Powerful API

    OSEck provides a simple yet powerful API that offers a high level of abstraction, typically enabling programmers to code the bulk of their application with just eight system calls. This versatile API, together with OSEck’s high-level messaging protocol, reduces application size and complexity, and makes programs easier to maintain, read and understand. OSEck provides a subset of the full-featured OSE API, making it easy to migrate applications between OSEck, OSE, and OSE Epsilon with few if any changes to the application code.

    Tailor Made for Distributed Systems

    Enea’s LINX interprocess communications (IPC) services extend the benefits of message passing to OSEck applications distributed across multiple DSPs. LINX makes complex applications easier to partition and distribute. LINX also makes the resulting code easier to scale and maintain, enabling equipment makers to expand their systems, perform upgrades and take advantage of the latest DSP hardware with minimal impact on existing applications.

    Seamless Connection Between DSPs and CPUs

    LINX IPC services also simplify the design of distributed systems that combine CPUs running OSE and DSPs running OSEck, either on the same or multiple cores. Many distributed systems utilize general-purpose CPUs for the control plane and DSPs for the user data plane. Through LINX, OSE and OSEck provide a unified solution that enables designers to leverage the control, networking, and application processing facilities of OSE on the host processor while utilizing the hard real-time attrib¬utes of OSEck on the DSP, without having to learn mul¬tiple programming environments.

    Versatile Simulation Environment

    Enea’s OSEck Soft Kernel simulation environment allows OSEck processes to run on a Windows, Unix, or Solaris host. It can also work together with a running real-time system.  This enables designers to build hybrid soft/hard OSEck target environments in which designers can run a portion of their application on the host and migrate it to hard targets as hardware becomes available.

    Supported Processors

    • Texas Instruments: C6000 and C5000 family including:
      TMS320C64x+
      TMS320C64x
      TMS320C62x
      TMS320C67x
      TMS320C55x
      TMS320C54x 
    • StarCore LLC: SC1000 and SC2000 family
    • Freescale (Motorola):
      MSC8101
      MSC8102 (Multicore)
      MSC8103 (Single core) 
      MSC8122
      MSC8126
      MSC8144 (PACSUN)
    • Freescale:
      MPC5554
      MPC555
      MPC565
    • Analog Devices:
      TigerSHARC TS201S
      TS101S
      Blackfin (BF533)
    • LSI Logic:
      ZSP 500
      ZSP400 and DSP cores
    • Agere: DSP 16k

     

    Footprint as low as 8 kbytes Reduces memory cost; Fits most DSP configurations
    Scalable at the function level Functionality and footprint can be optimized for each application
    Event-driven, pre-emptive, hard real-time performance Ideal for time-critical signal processing and control applications
    Intuitive message passing architecture and programming model Facilitates modular system design and reduces complexity; Lowers maintenance costs
    LINX  interprocess communications between processes residing on multiple DSPs and CPUs Simplifies distributed design and increases scalability; Seamless communications between OSEck-based DSPs and OSE-based controllers
    Built-in error handling Increases system reliability, availability and robustness
    Same architecture and API as OSE and OSE Epsilon Reuse applications across OSE RTOS family
    System-level simulation Develop code in advance of target hardware